Index: gcc-4.4.7/gcc/config/arm/cirrus.md
===================================================================
--- gcc-4.4.7.orig/gcc/config/arm/cirrus.md	2013-07-13 18:50:33.000000000 +0000
+++ gcc-4.4.7/gcc/config/arm/cirrus.md	2013-07-13 18:50:58.000000000 +0000
@@ -251,15 +251,16 @@
    (set_attr "cirrus" "normal")]
 )
 
-(define_insn "cirrus_ashldi3"
-  [(set (match_operand:DI            0 "cirrus_fp_register" "=v")
-	(ashift:DI (match_operand:DI 1 "cirrus_fp_register"  "v")
-		   (match_operand:SI 2 "register_operand"    "r")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK && TARGET_CIRRUS_DI"
-  "cfrshl64%?\\t%V1, %V0, %s2"
-  [(set_attr "type" "farith")
-   (set_attr "cirrus" "normal")]
-)
+; Disabled because cfrshl64 only shifts by -32 to +31 places
+;(define_insn "cirrus_ashldi3"
+;  [(set (match_operand:DI            0 "cirrus_fp_register" "=v")
+;	(ashift:DI (match_operand:DI 1 "cirrus_fp_register"  "v")
+;		   (match_operand:SI 2 "register_operand"    "r")))]
+;  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK && TARGET_CIRRUS_DI"
+;  "cfrshl64%?\\t%V1, %V0, %s2"
+;  [(set_attr "type" "farith")
+;   (set_attr "cirrus" "normal")]
+;)
 
 (define_insn "cirrus_ashldi_const"
   [(set (match_operand:DI            0 "cirrus_fp_register" "=v")
Index: gcc-4.4.7/gcc/config/arm/arm.md
===================================================================
--- gcc-4.4.7.orig/gcc/config/arm/arm.md	2013-07-10 02:35:45.000000000 +0000
+++ gcc-4.4.7/gcc/config/arm/arm.md	2013-07-13 18:50:58.000000000 +0000
@@ -3127,8 +3127,7 @@
            values to iwmmxt regs and back.  */
         FAIL;
     }
-  else if (!TARGET_REALLY_IWMMXT
-	   && !(TARGET_HARD_FLOAT && TARGET_MAVERICK && TARGET_CIRRUS_DI))
+  else if (!TARGET_REALLY_IWMMXT)
     FAIL;
   "
 )