Index: gcc-4.3.6/gcc/config/arm/cirrus.md
===================================================================
--- gcc-4.3.6.orig/gcc/config/arm/cirrus.md	2013-07-12 15:43:07.000000000 +0200
+++ gcc-4.3.6/gcc/config/arm/cirrus.md	2013-07-12 15:43:31.000000000 +0200
@@ -251,15 +251,16 @@
    (set_attr "cirrus" "normal")]
 )
 
-(define_insn "cirrus_ashldi3"
-  [(set (match_operand:DI            0 "cirrus_fp_register" "=v")
-	(ashift:DI (match_operand:DI 1 "cirrus_fp_register"  "v")
-		   (match_operand:SI 2 "register_operand"    "r")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK && TARGET_CIRRUS_DI"
-  "cfrshl64%?\\t%V1, %V0, %s2"
-  [(set_attr "type" "farith")
-   (set_attr "cirrus" "normal")]
-)
+; Disabled because cfrshl64 only shofts by -32 to +31 places
+;(define_insn "cirrus_ashldi3"
+;  [(set (match_operand:DI            0 "cirrus_fp_register" "=v")
+;	(ashift:DI (match_operand:DI 1 "cirrus_fp_register"  "v")
+;		   (match_operand:SI 2 "register_operand"    "r")))]
+;  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK && TARGET_CIRRUS_DI"
+;  "cfrshl64%?\\t%V1, %V0, %s2"
+;  [(set_attr "type" "farith")
+;   (set_attr "cirrus" "normal")]
+;)
 
 (define_insn "cirrus_ashldi_const"
   [(set (match_operand:DI            0 "cirrus_fp_register" "=v")