MaverickCrunch 64-bit arithmetic instructions do saturating arithmetic
by default, which is not what GCC (or programs) expect. Workround is to
set the ISAT bit in the DSPSC register before main() is called.

This makes the OpenSSL testsuite succeed instead of failing.

Index: gcc-4.3.6/gcc/crtstuff.c
===================================================================
--- gcc-4.3.6.orig/gcc/crtstuff.c	2013-07-12 15:42:50.000000000 +0200
+++ gcc-4.3.6/gcc/crtstuff.c	2013-07-12 15:43:10.000000000 +0200
@@ -49,7 +49,56 @@
    make whatever (small?) adaptations are needed.  (Some work may be
    needed on the ROSE assembler and linker also.)
 
-   This file must be compiled with gcc.  */
+  This file must be compiled with gcc.  */
+
+#if defined(CRT_BEGIN) && defined(__MAVERICK__)
+/*
+ * Set the Cirrus Logic MaverickCrunch's ISAT bit in the DSPSC register
+ * so that 64-bit add/sub/mul do not saturate.
+ */
+
+/* Exception handler to detect whether Crunch is present and, if not,
+ * skip its setup so as not to provoke SIGILL on non-Crunch hardware.
+ */
+
+#include <setjmp.h>
+#include <signal.h>
+typedef void (*sighandler_t)(int);
+
+static jmp_buf no_crunch_env;
+
+static void no_crunch_here(int sig)
+{
+	longjmp(no_crunch_env, sig);
+}
+
+__attribute__((constructor))
+void
+maverick_crunch_dspsc_set_isat(void)
+{
+        register int tmp;		/* A workhorse ARM register */
+	sighandler_t old_handler;	/* Previous SIGILL handler (none) */
+
+	/* Test for Maverick presence:
+	 * If cfmv32sc provokes SIGILL, it's not there
+	 */
+	old_handler = signal(SIGILL, no_crunch_here);
+	if (setjmp(no_crunch_env)) {
+		/* Returning from SIGILL: No crunch present. Do nothing. */
+		signal(SIGILL, old_handler);
+		return;
+	}
+
+        asm("cfmv32sc   mvdx0, dspsc");         /* Get DSPSC contents */
+        asm("cfmvrdl    %0, mvd0" : "=r"(tmp)); /* Put lower 32 in ARM reg */
+        asm("orr        %0, %0, #0x00800000" : "=r"(tmp) : "r"(tmp)); /* Set bit 23 (ISAT) */
+        asm("cfmvdlr    mvd0, %0" : : "r"(tmp));/* Copy back to 64-bit reg */
+        asm("cfmvsc32   dspsc, mvdx0");         /* Write to DSPSC */
+
+	signal(SIGILL, old_handler);
+}
+#endif
+
 
 /* Target machine header files require this define. */
 #define IN_LIBGCC2